A field-effect transistor (FET) is a semiconductor device that includes three terminals: a gate, a source, and a drain. A FET uses an electric field applied by the gate to control the electrical conductivity of a channel through which charge carriers (e.g., electrons or holes) flow from the source to the drain. In instances where the charge carriers are electrons, the FET is referred to as an n-channel device, and in instances where the charge carriers are holes, the FET is referred to as a p-channel device. Some FETs have a fourth terminal called, the body or substrate, which can be used to bias the transistor. Metal-oxide-semiconductor FETs (MOSFETs) include a gate dielectric layer between the gate and the channel. A MOSFET-based integrated circuit fabrication process generally includes a front-end or front-end-of-line (FEOL) portion and a back-end or back-end-of-line (BEOL) portion. The front-end or FEOL is generally the first portion of the fabrication process where individual semiconductor devices such as transistors (e.g., MOSFETs) are formed, including all processes up to the deposition of metal contacts (sometimes referred to as TCN metal for source/drain contacts and GCN metal for gate contacts). The back-end or BEOL, not to be confused with far-back-end chip fabrication, is the second portion of integrated circuit fabrication includes forming the interconnect layers that operatively couple the individual semiconductor devices into a functional circuit. BEOL may include any number of metallization layers (e.g., metal layers M1-M9), depending on the target application or end use. There are a number of non-trivial issues associated with such integrated circuit fabrication processes.